For L2 switches, there are mac addresses for different functions (to be able to communicate (when we want to telnet, ping or do snmp to the switch) and spanning tree (to form the bridge ID). On some manufactures switches, they use 1 mac address for all functions, Cisco does not. On the 4/5/6x00 devices, there are 1024 mac addresses assigned to the upervisor (1 or more for the switch, 1000 for spanning tree (PVST, each instance has its ' own mac address)). To see the addresses on those switches, do a show module. On the XL series, there is a range, but it seems much smaller (at least on my 2916XL), if you do a show mac self, you would see the range of addresses assigned to the switch. It will use the first one in the range for it self and as part of the bridge id for spanning tree. For Cisco, they are burned in an eprom...but it varies on platform as to were they are located (mother board, supervisor or in the case of the 5500, on the backplane).
Catalyst 6000 family switches have a pool of 1024 MAC addresses that can be used as bridge identifiers for VLANs running under PVST+ or for MISTP instances. You can use the show module command to view the MAC address range.
Hi Kevin, When looking at Layer2 don't think of each switch interface as having an addressable MAC.
In your example you have PC1 (10.0.0.1) connected to fa0/1 and PC2 (10.0.0.2) connected to fa0/2, imagine a ping request from PC1 to PC2 in this scenario.
1. PC1 - ping 10.0.0.2, PC1 does not currently have an entry in the arp table for this ip address so it sends a broadcast arp request, asking "who has ip address 10.0.0.2? what is your mac address"
2. SW1 sees this arp request, the first thing it does is make an entry in it's mac-address table for PC1's ip to mac translation and marks it reachable via fa0/1. Now SW2 forwards the arp broadcast out every other available port, except the port on which it was recieved (this action is know as flooding)
3. PC2 sees the arp broadcast and replies with an arp unicast response to PC1 containing PC2's ip address and mac-address.
4. SW2 sees this arp response so it makes an entry in it's mac-address table for PC2's ip to mac translation, and marks it reachable via fa0/2.
5.. PC1 eventually get the arp response from PC2 and packages the initial ping request with the correct mac-address for PC2
A L2 switch generally only has an IP address for remote management purposes and it is assigned to a virtual interface (such as vlan 1).
Hope this helps.
Hi, Suy and Jornathon,
Thank you for both clarify and comfirm. When Layer 2 traffic communication, simply no MAC for port. Got it:)
I happen to come across this thread from 2010. The OP concluded that there is no MAC for ports on layer 2 switch. That is not correct. If we issue the command "show interface | include address", we can see the MAC addresses for all the ports. If we hook two switches together, the two switches will learn MAC addresses for each other's MAC address for the connected ports.
Am I correct?
I agree that all switch ports have a MAC address, the same for all the ports of the switch or different for each port of the switch. But I disagree that 2 switches learn these MAC addresses when there are connected each other.
Learning is for the MAC frames from the data or the management planes, and not for the MAC frames coming from the control plane.
I totally agree with you, i found that 2960's connected to each other learn the mac's of each other connected ports.. not sure why is that!! & also not sure if the 2950's do the same! or it's an IOS version thing!!! if anybody can try it oneself, you'll see it right away in the mac address-table!!! anyone got a clue why is the ports macs appear in other switches mac table???????
Catalyst switches do have multiple MAC addresses. If you do a "show version" on your Catalyst switch, you will see the base MAC address, this MAC address is used in as the general purpose MAC address. Examples of the use of this MAC is for STP BID (Priority.Base MAC), LACP System ID, Stacking, etc.
Now, every port of a switch has a MAC address? The answer is yes, it does. This can be seen with the "show interface" command. In fact, let's shutdown ALL the interfaces of a switch and then clear the MAC table to demonstrate that.
SWX4(config)#interface range fastethernet0/1 - 48
Now that the interfaces are shutdown, let's clear the CAM table,
SWX4(config)#do clear mac address-table dynamic
Now, let's do a "show mac address-table dynamic",
SWX4(config)#do clear mac address-table dynamic
As we see, nothing it's being learned on the switch, because we shutdown all FE interfaces, now let's verify if the interfaces has MAC addresses attached to them,
Hardware is Fast Ethernet, address is 000f.24b7.1400 (bia 000f.24b7.1400)
Hardware is Fast Ethernet, address is 000f.24b7.1402 (bia 000f.24b7.1402)
Hardware is Fast Ethernet, address is 000f.24b7.1403 (bia 000f.24b7.1403)
Hardware is Fast Ethernet, address is 000f.24b7.1404 (bia 000f.24b7.1404)
Hardware is Fast Ethernet, address is 000f.24b7.1405 (bia 000f.24b7.1405)
As we see, these MAC addresses are not dynamically learned by the switch, instead, these MAC addresses are attached to their respective interface in a sequential order. These MAC addresses are NOT learned by the remote switch, the MAC address that is learned on the switch is the MAC address from the attached device.
Catalyst switches have default MAC addresses attached inside the CAM table, these MAC addresses are permanent and the purpose of these are for control plane traffic, ex, 0100.0ccc.cccd is for SSTP also known as PVST+, 0180.c200.0000 is a well known multicast address for STP (802.1D).
SWX4(config)#do show mac address-table
Mac Address Table
Vlan Mac Address Type Ports
---- ----------- -------- -----
All 000f.24b7.1400 STATIC CPU
All 000f.24b7.1401 STATIC CPU
All 000f.24b7.1402 STATIC CPU
All 000f.24b7.1403 STATIC CPU
All 000f.24b7.1404 STATIC CPU
All 000f.24b7.1405 STATIC CPU
All 000f.24b7.1406 STATIC CPU
All 000f.24b7.1407 STATIC CPU
As you can see, these MAC addresses are learned from the CPU, since control plane traffic is processed on the general purpose CPU.